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 Integrated Device Technology


  • 5P49V5908 VersaClock 5 Programmable Clock Generator

  • Created: May 11, 2016

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Summary

The IDTs fifth generation of programmable clock technology (VersaClock 5) is a low power consumption clock generator. The 5P49V5908 is one of the members of the VersaClock 5 family of programmable clock generators that features low phase noise PLL, with less than 700 femtoseconds RMS phase jitter over the full 12kHz to 20MHz range. The device can deliver high-level operation while still has a low power core current consumption of around 35mA. It features 11 differential outputs compared to the other VersaClock, which has less differential outputs. It also allows multiple devices to be used in the system by configuring one of the two I2C addresses.


The programmable clock generator core and the low power-HCSL outputs both require 1.8V level of power supply. The VDDO for LVDS and LVCMOS is from 1.8V to 3.3V, and 2.5 to 3.3V for LVPECL and regular current-mode HCSL output. The device has up to four independent output frequencies with a total of 11 differential output and one reference output. The ports OUT1/OUT1B, OUT2/OUT2B, and OUT4/OUT4B can form three universal output pairs. Each output pair has individually programmable frequencies and can be configured as one differential pair (LVDS, LVPECL or Regular HCSL) or two LVCMOS output. The universal output pairs are capable of producing independent frequencies up to 350MHz. The 11 differential output are classified as three universal output pair with each can be configured as one differential output pair (LVDS, LVPECL or Regular HCSL) and 8 low power HCSL output. It has one reference output LVCMOS output clock.


This design is a single timing device; because of this it is a good replacement of crystals, oscillators, programmable oscillators, and buffers. It is suitable in data communications, telecommunications and computing applications. See design notes for the layout and ferrite beads in the “Notes” option of the tool.

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